Sudhakar Yalamanchili earned his Ph.D. degree in Electrical and Computer Engineering in 1984 from the University of Texas at Austin, after which he joined Honeywell’s Systems and Research Center in Minneapolis where he worked as a Senior, and then Principal Research Scientist from 1984 to 1989. In both capacities, he served as the Principal Investigator for projects in the design and analysis of multiprocessor architectures for embedded applications. While at Honeywell, Dr. Yalamanchili also served as an Adjunct Faculty and taught in the Department of Electrical Engineering at the University of Minnesota. He joined the ECE faculty at Georgia Tech in 1989 where he is now a Joseph M. Pettit Professor of Computer Engineering. He has served as the PI and Co-PI on sponsored projects in the areas of reconfigurable computing, high performance interconnection networks, and resource management for parallel architectures. He is the author of VHDL Starters Guide, 2nd edition, Prentice Hall 2004, VHDL: From Simulation to Synthesis, Prentice Hall, 2000, and coauthor with J. Duato and L. Ni, of Interconnection Networks: An Engineering Approach, Morgan Kaufman, 2003.
Dr. Yalamanchili is a Senior Member of the IEEE. He has served as a Distinguished Visitor of the IEEE, and associate editor for the IEEE Transactions on Parallel and Distributed Processing and IEEE Transactions on Computers. He contributes professionally through service on conference and workshop program committees in the area of high performance computing, computer architecture, and interconnection networks.