Run-time Computation for Enhanced Integrated Circuits and Systems

C3PS Seminar Series by Visvesh Sathe Ph.D.

Visvesh Sathe, Ph.D.  
Department of Electrical and Computer Engineering
University of Washington
Seattle, Washington


For over half a century, Integrated Circuits have been designed and developed (rather successfully) toward the goal of enhancing computing performance and efficiency.  During this time, the relationship between circuit design and computing has remained largely one-directional: Careful, detailed circuit design is performed in the service of building computing systems. Notwithstanding a post-Moore and post-Dennard reality, the impressive strides made by digital computing thus far prompt an important question which re-examines the traditional circuit-computing relationship: Can runtime computing itself be used to enhance circuit and system capabilities? If so, under which conditions and to what extent?

In this talk, I will present recent efforts in my group that represent two different ways that  computing can  augment circuit capabilities to  (1) overcome limitations inherent in circuit design; and (2) enable rapid, time-optimal control of integrated control systems. The effectiveness and limitations of both efforts are examined through a representative test-chip design. These efforts have yielded a robust True-Random Number Generators (TRNGs) demonstrating the lowest measured energy-per-bit (2.58pJ/bit), and an all-digital PLLs (ADPLLs) for system clocking applications with the fastest demonstrated cold-start and re-lock times (16 Refclk cycles, mean).

About the Presenter

Visvesh Sathe is an assistant professor at the University of Washington, where his group works on a number of topics related to digital, mixed-signal and power circuits and architectures. Prior to joining the University of Washington, he served as a Member of Technical Staff in the Low-Power Advanced Development Group at AMD, where his research focused on inventing and developing new technologies in clocking, voltage-noise mitigation and circuit-design for energy-efficient and high-performance computing. Dr. Sathe led the research and development effort at AMD that resulted in the first-ever resonant clocked commercial microprocessor.  Dr. Sathe received the B.Tech degree from the Indian Institute of Technology Bombay in 2001, and the M.S and Ph.D. degrees from the University of Michigan, Ann Arbor in 2004 and 2007, respectively. He has served as a chapter officer for the Denver Solid State Circuits Society, as has previously served as a technical program committee member at the Custom Integrated Circuits Conference as well as a JSSC guest editor.