M. Swaminathan Patents
Modeling TSV Interposer Considering Depletion Capacitance and Substrate Effects, US20160034633A1, K.J. Han & M. Swaminathan
Modeling of Power Distribution Networks for Path Finding, US20170017744A1, M. Swaminathan, B. Martin & K.J. Han
M. Bakir Patents
Mixed-Signal Substrate with Integrated Through-Substrate Vias, US20170223825A1, P. Thadesar & M. S. Bakir
A. Chatterjee Patents
Amplifier having orthogonal tuning elements, US9548705B2, S. Sen & A. Chatterjee
Analog Push Pull Amplifier-Based Physically Unclonable Function for Hardware Security, US20170126415A1, S. Deyati, A. Chatterjee, & B.J. Muldrey
C. Ji Patents
Dynamic Modeling and Resilience for Power Distribution, US20150331063A1, C.Y. Ji & Y. Wei
Y. Joshi Patents
Systems and methods for intelligent controls for optimal resource allocation for data center operations, US20170187592A1, R. Ghosh & Y.K. Joshi
P. Khol Patents
Anion exchange polyelectrolytes, US9242243B2, J.F. Zhou, P.A. Khol, & M. Unlu
Positive-tone, chemically amplified, aqueous-developable, permanent dielectric, US9740096B2, B.K. Mueller & P.A. Khol
Transient adhesives, methods of making, and methods of use, US20170306199A1, P.A. Khol, A. Engler III, J. Schwartz, G. Gourdin, J. Jiang, & O. Phillips
S.K. Lim Patents
Through-silicon via (TSV) crack sensors for detecting TSV cracks in three-dimensional (3D) integrated circuits (ICs) (3DICs), and related methods and systems, US9869713B2, S.K. Lim, R. Radojcic & Y. Du
Power delivery network (PDN) design for monolithic three-dimensional (3-D) integrated circuit (IC), US9741691B2, S.K. Lim, K. Samadi & Y. Du
Memory controller placement in a three-dimensional (3D) integrated circuit (IC) (3DIC) employing distributed through-silicon-via (TSV) farms, US9626311B2, S. K. Lim, K.S. Chatha, Y. Du & K. Samadi
Clock tree synthesis for low cost pre-bond testing of 3D integrated circuits, US9508615B2, S.K. Lim, K. Samadi, P. Kamal & Y. Du
Intellectual property block design with folded blocks and duplicated pins for 3D integrated circuits, US9483598B2, S.K. Lim, K. Samadi & Yang Du
High quality physical design for monolithic three-dimensional integrated circuits (3d ic) using two-dimensional integrated circuit (2d ic) design tools, US20160042110A1, S. K. Lim, K. Samadi, P. Kamal & Y. Du
Clock skew compensation with adaptive body biasing in three-dimensional (3D) integrated circuits (ICs) (3DICs), US9256246B1, S. K. Lim & Y. Du
A. Raychowdhury Patents
Digitally phase locked low dropout regulator apparatus and system using ring oscillators, US9870012B2, A. Raychowdhury, D. Somasekhar, J.W. Tschanz & V.K. De
Low power voice detection, US9633654B2, A. Raychowdhury, W. M. Beltman, J.W. Tschanz, C. Tokunaga, M.E. Deisher & T.E. Walsh
Spin transfer torque based memory elements for programmable device arrays, US9577641B2, A. Raychowdhury, J.W. Tschanz & V.K. De
Digital clamp for state retention, US9484917B2, A. Raychowdhury, C. Augustine, J.W. Tschanz & V.K. De
Balancing energy barrier between states in perpendicular magnetic tunnel junctions, US9472748B2, C.C. Kuo, B.S. Doyle, A. Raychowdhury, R. Golizadeh & K. Oguz
Methods and systems to read a magnetic tunnel junction (MTJ) based memory cell based on a pulsed read current, US9455011B2, A. Raychowdhury, D. Kencke, B. Doyle, C. C. Kuo, J. Tschanz, F. Hamazaoglu, Y. Wang & R.G. Mojarad
Hua Wang Patents
Mixed-signal power amplifier and transmission systems and methods, US20180019711A1, H. Wang, F. Wang, S. Hu & H.T. Nguyen
CMOS RF switch device and method for biasing the same, US9762192B2, D.K. Homol & H. Wang
Multimodality cmos sensor array for physiological characterization of cells, US20160245788A1, H. Wang, T.Y. Chi & J.S. Park
Multimodality cmos sensor array for physiological characterization of cells, US20160245788A1, H. Wang, T.Y. Chi & J.S. Park
